NVIDIA Recruitment 2021 | Freshers | ASIC Design Engineer | BE/ B.Tech/ ME/ M.Tech  CSE/ IT/ Electrical Engineering | Hyderabad/ Bangalore

Nvidia Off Campus Drive 2021


NVIDIA Recruitment 2021 | Freshers | ASIC Design Engineer | BE/ B.Tech/ ME/ M.Tech  CSE/ IT/ Electrical Engineering | Hyderabad/ Bangalore

NVIDIA Recruitment 2021: NVIDIA’s invention of the GPU sparked the PC gaming market. The company’s pioneering work in accelerated computing—a supercharged form of computing at the intersection of computer graphics, high performance computing and AI—is reshaping trillion-dollar industries, such as transportation, healthcare and manufacturing, and fueling the growth of many others. NVIDIA Recruitment 2021: NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you’re creative and autonomous, we want to hear from you! NVIDIA Recruitment 2021:

  • Company Website: www.nvidia.com/en-us
  • Positions: ASIC Design Engineer – New College Graduate
  • Experience: Freshers
  • Salary: Best In Industry
  • Job Location: Hyderabad, Bangalore

Eligibility Criteria : BS or MS or equivalent experience in Electrical Engineering or Computer Science. Job Description:- As a member of our ASIC backend/timing team, you’ll be working on product designs, focusing on such tasks as clocks, timing convergence, chip layout planning, design optimization and automation of work flows. Specifically you’ll be focusing on full chip layout planning (partitioning, planning clock distribution and other structures, methodology), full chip  timing closure signoff (using tools such as Synopsys Primetime, Cadence Tempus etc.), design optimization, and gate-level design of high-speed logic. In this role you will also interface with architecture, rtl design, layout implementation, methodology and custom design teams to drive design implementation, timing analysis/closure all the way from micro-architecture to tape-out. Responsibilities:

  • Develop and enhance timing analysis/signoff work flow from frontend (pre-layout) to backend (post-layout) at both chip and block level.
  • Develop custom timing scripts using tcl/primetime for clock skew analysis, special circuits such as clock dividers, core logic <-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory, HDMI, etc.
  • Chip level Integration, physically partitioning and floor planning.
  • Design optimization and timing convergence related tasks.
  • Development of PD work flows.
  • How to Apply for NVIDIA Recruitment 2021?
  • Desirous candidates may apply through online mode ASAP.
  • Apply Link: Click Here

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